EPM3512ATI256-10N vs EPM3512AFI256-7N Comparaison
Comparaison détaillée côte à côte de EPM3512ATI256-10N par Intel et EPM3512AFI256-7N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM3512AFI256-7N - MAX 3000A CPLD, 512 Macrocells | Intel / Altera
EPM3512AFI256-7N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPM3512ATI256-10N | EPM3512AFI256-7N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $19,85 | $27,95 |
| Manufacturer | Intel (formerly Altera Corporation) | — |
| Family | MAX 3000A | MAX 3000A |
| Device | EPM3512A | — |
| Macrocells | 512 | — |
| Usable Gates | 10,000 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O | 212 | — |
| Speed Grade | -10 (10 ns pin-to-pin delay) | -7 |
| Boîtier | 256-pin BGA (TI256) | 256-ball FBGA |
| Température de fonctionnement | -40C to +85C (Industrial) | — |
| Core Voltage | 3.3 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Programming Technology | EEPROM (non-volatile, in-system programmable) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan, 4-pin JTAG | — |
| Programmable Security Bit | Yes (design protection) | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Statut du cycle de vie | Obsolete / Last Time Buy (per Altera product discontinuation notices) | — |
| Device Logic Elements / Macrocells | — | 512 macrocells |
| Typical Usable Gates | — | 10,000 gates |
| Maximum User I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Maximum Operating Frequency (fMAX) | — | 116.3 MHz |
| Pin-to-Pin Delay (tPD, speed grade -7) | — | approximately 7.5 ns |
| Supply Voltage (VCCINT) | — | 3.3 V |
| MultiVolt I/O Levels | — | 2.5 V / 3.3 V / 5 V mixed |
| Configuration Memory | — | Non-volatile EEPROM |
| Programming Interface | — | IEEE 1149.1 JTAG (in-system programmable) |
| Plage de température de fonctionnement | — | -40C to +85C (industrial) |
| Lead-Free / RoHS | — | Yes ('N' suffix, lead-free) |
| Design Software | — | Quartus II (legacy MAX 3000A support) |