EPM5032DC-25 vs EPM5032JC-20 Comparaison
Comparaison détaillée côte à côte de EPM5032DC-25 par Altera et EPM5032JC-20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5032DC-25 | EPM5032JC-20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3,55 | $9,75 |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Product Family | MAX 5000 | — |
| Device Type | UV Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 32 | 32 |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | — |
| Maximum Counter Frequency (fCNT) | [DATA_NEEDED: maximum counter frequency] | — |
| Setup Time (tSU) | [DATA_NEEDED: setup time] | — |
| Number of Dedicated Inputs | 32 (in DIP-28 pinout) | — |
| Number of I/O Pins | 22 (in DIP-28 pinout, 4 used as dedicated inputs) | — |
| Boîtier | CDIP-28 (Windowed Ceramic DIP-28) | 68-pin JLCC (windowed ceramic) |
| Process Technology | CMOS, EPROM (UV-Erasable) | CMOS |
| Architecture | PAL-Type, Single-LAB, 32-Macrocell | PAL-type AND-OR array with PIA interconnect |
| Output Structure | Programmable I/O with output enable | — |
| Flip-Flop Configuration | D, T, JK, or SR (programmable) | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Statut RoHS | Lead Free / RoHS Compliant (per distributor listings) | — |
| Programming Method | UV erase + Altera/Intel MAX+PLUS II programmer | — |
| Erasure Method | UV light through ceramic window | — |
| Product Type | — | UV-erasable Programmable Logic Device (PLD) |
| Family | — | MAX 5000 |
| Logic Array Blocks (LABs) | — | 1 |
| Product Terms (P-terms) | — | 320 |
| Propagation Delay (tPD) | — | 20 ns |
| Fréquence d'horloge maximale | — | 62.5 MHz |
| Setup Time | — | 10 ns |
| I/O Lines | — | 16 (bidirectional) |
| Dedicated Inputs | — | 8 |
| Total Inputs | — | 24 |
| Erase Method | — | UV (12V VPP + ultraviolet exposure) |
| Programming Voltage (VPP) | — | 12 V |
| Statut du cycle de vie | — | Obsolete (legacy Altera MAX 5000) |