EPM5032LC-15 vs EPM5032LC-20 Comparaison
Comparaison détaillée côte à côte de EPM5032LC-15 par Altera et EPM5032LC-20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5032LC-15 | EPM5032LC-20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,20 | $8,40 |
| Family | MAX 5000 EPLD | — |
| Architecture | PAL-type AND/OR with PIA | — |
| Usable Gates | 600 | 600 gates |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 4 | — |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 16 | 16 |
| Maximum Operating Frequency | 83.3 MHz | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V ±5% |
| Technology | CMOS EPROM, 1.0 um process | — |
| Programmability | UV-Erasable / OTP | — |
| Boîtier | JLCC-28 (windowed ceramic) | LCC-28 (Plastic Leaded Chip Carrier, J-lead) |
| Température de fonctionnement | 0C to +70C (commercial) | 0 °C to +70 °C (commercial; -55 °C to +125 °C military per /883B variants) |
| Statut RoHS | Non-compliant (contains Pb, ceramic-windowed package) | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 5000 |
| Product Type | — | EPLD / CPLD (One-Time Programmable / UV-Erasable) |
| Logic Blocks (LABs) | — | 1 |
| Speed Grade | — | -20 (20 ns pin-to-pin) |
| Maximum Frequency | — | 71.4 MHz |
| Propagation Delay (tPD) | — | 20 ns |
| Total Inputs | — | 24 |
| Output Functions | — | 16 |
| Product Terms per Output | — | 16 |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Type de montage | — | Surface Mount |
| Niveau MSL | — | [DATA_NEEDED: MSL] |