EPM5032LC-15 vs EPM5032SC-25 Comparaison
Comparaison détaillée côte à côte de EPM5032LC-15 par Altera et EPM5032SC-25 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5032LC-15 | EPM5032SC-25 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,20 | $8,20 |
| Family | MAX 5000 EPLD | MAX 5000 |
| Architecture | PAL-type AND/OR with PIA | — |
| Usable Gates | 600 | — |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 4 | — |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 16 | — |
| Maximum Operating Frequency | 83.3 MHz | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V (typical, 4.5 V to 5.5 V) |
| Technology | CMOS EPROM, 1.0 um process | CMOS, UV-erasable or OTP |
| Programmability | UV-Erasable / OTP | — |
| Boîtier | JLCC-28 (windowed ceramic) | PDSO-28 (Plastic DIP Small Outline, SOIC-28 equivalent) |
| Température de fonctionnement | 0C to +70C (commercial) | — |
| Statut RoHS | Non-compliant (contains Pb, ceramic-windowed package) | [DATA_NEEDED: RoHS status - legacy Altera part; verify with distributor] |
| Device Type | — | EPLD (Erasable/OTP Programmable Logic Device) |
| Bidirectional I/O | — | 16 |
| Total Pin Count | — | 28 |
| Speed Grade | — | -25 |
| Propagation Delay (tpd) | — | 25 ns |
| Maximum Counter Frequency (fCNT) | — | 91 MHz |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Type de montage | — | Surface Mount |
| Programming Method | — | Altera programming hardware (legacy iMPACT or MAX+PLUS II) |