EPM5064LC-1 vs EPM5064JI-1 Comparaison
Comparaison détaillée côte à côte de EPM5064LC-1 par Altera et EPM5064JI-1 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5064LC-1 | EPM5064JI-1 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $3,40 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | — |
| Usable Gates | 1.25K (approx.) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Internal Operating Frequency | 62.5 MHz | — |
| Propagation Delay (tPD) | 40 ns | [DATA_NEEDED: combinational tPD from datasheet] |
| Input Lines | 36 | — |
| Dedicated Inputs | 7 | — |
| Output Lines | 28 | — |
| Programming Technology | OTP / UV-Erasable EPROM | — |
| Boîtier | 44-pin PLCC (Plastic Leaded Chip Carrier) | 68-pin PLCC (windowed ceramic) |
| Process Technology | CMOS | CMOS, UV-erasable |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial vs industrial grade temp range] |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: not stated in provided data] |
| Programming Interface | JTAG (ByteBlaster-compatible) | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| User I/O Pins | — | [DATA_NEEDED: user I/O count from datasheet] |
| Logic Elements | — | [DATA_NEEDED: total logic elements] |
| Tension d'alimentation | — | 5 V |
| Speed Grade | — | JI-1 (commercial, -10/-12/-15 family) |
| Programmability | — | UV-erasable (windowed package) |
| Data Retention | — | 25 years (per MAX 5000 datasheet) |
| Type de montage | — | Surface Mount |