EPM5064LC-1 vs EPM5128GC-2 Comparaison
Comparaison détaillée côte à côte de EPM5064LC-1 par Altera et EPM5128GC-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5064LC-1 | EPM5128GC-2 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $8,95 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 64 | 128 |
| Logic Array Blocks (LABs) | 4 | — |
| Usable Gates | 1.25K (approx.) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5 V (nominal) |
| Internal Operating Frequency | 62.5 MHz | — |
| Propagation Delay (tPD) | 40 ns | Approx. 25 ns (typical, -2 speed grade) |
| Input Lines | 36 | — |
| Dedicated Inputs | 7 | — |
| Output Lines | 28 | — |
| Programming Technology | OTP / UV-Erasable EPROM | UV-erasable EPROM |
| Boîtier | 44-pin PLCC (Plastic Leaded Chip Carrier) | — |
| Process Technology | CMOS | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Programming Interface | JTAG (ByteBlaster-compatible) | — |
| Logic Elements / Gates | — | 2,500 usable gates |
| Number of Usable Gates | — | 2,500 |
| Maximum Operating Frequency | — | 50 MHz |
| Package Type | — | 68-pin PGA (Pin Grid Array) |
| Package Code (per Partstack) | — | WPGA |
| Number of Terminals | — | 68 |
| Grade (per Partstack) | — | COMMERCIAL |
| Terminal Form | — | PIN/PEG |
| Configuration Memory | — | Non-volatile, one-time programmable (erasable via UV) |