EPM5128GC vs EPM5064JC-1 Comparaison
Comparaison détaillée côte à côte de EPM5128GC par Altera et EPM5064JC-1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5128GC | EPM5064JC-1 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $19,20 | $18,25 |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | 1250 (typical) |
| Logic Elements / LABs | [DATA_NEEDED: LAB count] | — |
| User I/Os | 68 | — |
| Package Type | WPGA (Windowed Ceramic Pin Grid Array) | — |
| Package Code | WPGA | — |
| Number of Terminals | 68 | — |
| Terminal Form | PIN/PEG (through-hole PGA with alignment pegs) | — |
| Package Shape | Square | — |
| Temperature Grade | Commercial | — |
| Supply Voltage (Vcc) | 5 V | — |
| Process Technology | CMOS, UV-erasable | 0.8 µm CMOS |
| Architecture | EPLD, programmable AND/OR array with fixed OR plane | — |
| Propagation Delay (tpd) | [DATA_NEEDED: tpd in ns] | — |
| Maximum Frequency (fmax) | [DATA_NEEDED: fmax in MHz] | — |
| Programmable Security Bit | Yes | — |
| Configuration Memory | Non-volatile UV-EPROM (windowed ceramic) | — |
| Type de montage | Through-Hole (PGA socket required) | Surface Mount (PLCC socket recommended) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Non-compliant (windowed ceramic, contains Pb in glass frit) |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macro Cells | — | 64 |
| Logic Elements | — | 128 (Logic Array Blocks) |
| Maximum Operating Frequency | — | 33.3 MHz (fCNT) |
| Pin-to-Pin Delay (tPD) | — | [DATA_NEEDED: tPD typical/max in ns] |
| Supply Voltage (VCC) | — | 5 V nominal (4.75 V – 5.25 V) |
| Programmable Pins | — | 36 (typical I/O, 44-pin PLCC) |
| Dedicated Inputs | — | [DATA_NEEDED: dedicated input count] |
| Boîtier | — | 44-pin PLCC (J-lead, windowed ceramic) |
| Température de fonctionnement | — | 0 °C to +70 °C (commercial, -JC suffix) |
| Erasure Method | — | UV-erasable through quartz window |
| Programming Method | — | Altera Logic Programmer + MasterBlaster/ByteBlasterMV |
| JTAG Boundary Scan | — | Not supported (classic MAX architecture) |
| Military/Avionics SMD | — | 5962-01-417-3750 (QML variant: EPM5064JM/883) |