EPM5192AGC-20 vs EPM5192AJC-25 Comparaison
Comparaison détaillée côte à côte de EPM5192AGC-20 par Intel et EPM5192AJC-25 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192AGC-20 | EPM5192AJC-25 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $8,20 |
| Family | MAX 5000 | MAX 5000 EPLD |
| Device Type | EPLD (EEPLD, UV-erasable) | — |
| Macrocells | 192 | 192 |
| Usable Gates | 12,000 | — |
| Propagation Delay (tPD) | 20 ns | 25 ns |
| Counter Frequency (fCNT) | 100 MHz (max) | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Logic Array Blocks (LABs) | 8 | — |
| Dedicated I/O Pins | 96 | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| In-System Programmability | Yes (5 V ISP) | — |
| Security Bit | Yes (pattern read-back protected) | — |
| Boîtier | PGA-132 (ceramic windowed, 'GC') | PLCC-68 (windowed ceramic, AJC) |
| Type de montage | Through-hole (PGA socket) | Surface Mount |
| Température de fonctionnement | 0C to 70C (commercial) | [DATA_NEEDED: exact operating temperature range] |
| Statut RoHS | [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer | — | Altera (now Intel PSG) |
| Nombre de broches | — | 68 |
| Tension d'alimentation | — | 5 V (typical) |
| Logic Blocks | — | MAX 5000 LABs (Logic Array Blocks) |
| Programmable Pins | — | [DATA_NEEDED: number of user I/O pins] |
| Erasure Method | — | UV-erasable (windowed ceramic package) |
| Programming Technology | — | EPROM (non-volatile) |
| Military Grade | — | Likely MIL-STD-883 processing per 'J' suffix in AJC marking (verify) |