EPM5192AGC84-15 vs EPM5192AGC-15 Comparaison
Comparaison détaillée côte à côte de EPM5192AGC84-15 par Altera et EPM5192AGC-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192AGC84-15 | EPM5192AGC-15 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $42,00 | $27,80 |
| Family | MAX 5000 | — |
| Device Type | UV-Erasable/OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 7 |
| Propagation Delay (tPD) | 15 ns | 15 ns (pin-to-pin, -15 speed grade) |
| Maximum Internal Clock Frequency | 83.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | 5 V |
| Process Technology | CMOS | — |
| Programmable Element | UV-Erasable EPROM cell | — |
| Boîtier | 84-pin Ceramic PGA (Pin Grid Array) | Ceramic Pin Grid Array (PGA) |
| Type de montage | Through-Hole | — |
| Température de fonctionnement | Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] | [DATA_NEEDED: operating temperature range] |
| Statut RoHS | [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Series | — | MAX 5000 |
| Logic Array Blocks | — | 16 (typical for 192-macrocell MAX 5000) |
| Maximum User I/O Pins | — | 64 |
| Total Inputs | — | 72 |
| Technology | — | CMOS, UV-erasable EPROM |
| Programming Method | — | UV erase + EPROM program (via Altera programmer) |
| Statut du cycle de vie | — | Obsolete / Last Time Buy (per Altera legacy product list) |