EPM5192AGC84-20 vs EPM5192AGC84-15 Comparaison
Comparaison détaillée côte à côte de EPM5192AGC84-20 par Altera et EPM5192AGC84-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192AGC84-20 | EPM5192AGC84-15 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $41,20 | $42,00 |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Logic Gates (typical) | [DATA_NEEDED: typical gate count] | — |
| Maximum Clock Frequency (fMAX) | 66.7 MHz | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | — |
| Boîtier | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) | 84-pin Ceramic PGA (Pin Grid Array) |
| Package Code | WPGA | — |
| Erasure Method | UV-Erasable (with OTP window) | — |
| Process Technology | CMOS | CMOS |
| Operating Temperature Grade | Commercial | — |
| Tension d'alimentation | [DATA_NEEDED: VCC range] | — |
| I/O Standard | 5V CMOS / TTL compatible | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] |
| Type de montage | Through-Hole (Pin Grid Array socket) | Through-Hole |
| Device Type | — | UV-Erasable/OTP Complex PLD |
| Logic Array Blocks (LABs) | — | 12 |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Internal Clock Frequency | — | 83.3 MHz |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V |
| Programmable Element | — | UV-Erasable EPROM cell |
| Température de fonctionnement | — | Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] |