EPM5192AJC84-15 vs EPM5192ALC84-15 Comparaison
Comparaison détaillée côte à côte de EPM5192AJC84-15 par Altera et EPM5192ALC84-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM5192AJC84-15 - MAX 5000 CPLD, 192 Macrocells, 84-pin PLCC | Altera
EPM5192AJC84-15 ObsoleteComparaison des spécifications
| Paramètre | EPM5192AJC84-15 | EPM5192ALC84-15 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,95 | $13,20 |
| Family | MAX 5000 | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD / UV-Erasable / OTP Complex PLD |
| Macrocells | 192 | 192 |
| Propagation Delay (tpd) | 15 ns | — |
| Maximum Clock Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 4.75 V to 5.25 V (nominal 5 V) |
| Technology | CMOS, UV-erasable EPROM | — |
| Boîtier | 84-pin PLCC (J84C) windowed ceramic | 84-pin PLCC (QCCJ, J-bend ceramic) |
| Type de montage | Surface Mount | — |
| Température de fonctionnement | [DATA_NEEDED: commercial/industrial/military grade] | — |
| Programming Method | UV-erase + EPROM programming (windowed package) | — |
| Logic Blocks | 16 Logic Array Blocks (LABs) | — |
| I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Statut RoHS | Non-compliant (contains Pb, ceramic windowed package) | — |
| Process Technology | CMOS EPROM | CMOS (EPROM-based) |
| Device Family | — | MAX 5000 (EPM5192) |
| Dedicated Inputs | — | 7 |
| User I/O Pins | — | 64 |
| Propagation Delay (tPD) | — | 15 ns |
| Propagation Delay (Industry Variant) | — | 25 ns (per MicrochipUSA listing) |
| Programmability | — | UV-erasable window / OTP |
| Operating Temperature Grade | — | Commercial |
| Terminal Form | — | J-BEND |
| Package Code | — | QCCJ |
| Package Shape | — | SQUARE |
| Architecture | — | Programmable Logic Array + Macrocell Registers + PIA interconnect |