EPM5192AJI84-15 vs EPM5192AJC84-15 Comparaison
Comparaison détaillée côte à côte de EPM5192AJI84-15 par Altera et EPM5192AJC84-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM5192AJC84-15 - MAX 5000 CPLD, 192 Macrocells, 84-pin PLCC | Altera
EPM5192AJC84-15 ObsoleteComparaison des spécifications
| Paramètre | EPM5192AJI84-15 | EPM5192AJC84-15 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $27,80 | $18,95 |
| Device Family | MAX 5000 EPLD | — |
| Product Type | UV-Erasable / OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O Pins | 84 | — |
| Propagation Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | 5 V (single supply) |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS EPROM |
| Package Type | 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window | — |
| Type de montage | Through-Hole (SMD socket-compatible) | Surface Mount |
| Température de fonctionnement | -40 °C to +85 °C (Industrial, 'I' suffix) | [DATA_NEEDED: commercial/industrial/military grade] |
| Programming Method | UV erase + EPROM program via standard Altera programmer | UV-erase + EPROM programming (windowed package) |
| Design Tool Support | MAX+PLUS II (legacy); not supported by modern Quartus Prime | — |
| Statut RoHS | unknown | Non-compliant (contains Pb, ceramic windowed package) |
| Lead-Free | unknown | — |
| Sans halogène | unknown | — |
| Functional Equivalent (Plastic OTP) | EPM5192AJC84-15 (windowless plastic JLCC, same die) | — |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Propagation Delay (tpd) | — | 15 ns |
| Maximum Clock Frequency (fMAX) | — | 83.3 MHz |
| Technology | — | CMOS, UV-erasable EPROM |
| Boîtier | — | 84-pin PLCC (J84C) windowed ceramic |
| Logic Blocks | — | 16 Logic Array Blocks (LABs) |
| I/O Pins | — | [DATA_NEEDED: user I/O count] |