EPM5192AQC-1 vs EPM5192C-2 Comparaison
Comparaison détaillée côte à côte de EPM5192AQC-1 par Altera et EPM5192C-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192AQC-1 | EPM5192C-2 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $17,40 | $13,20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | One-Time Programmable (OTP) CPLD | Complex Programmable Logic Device (CPLD) |
| Macrocells | 192 | 192 |
| Logic Elements / Logic Array Blocks | [DATA_NEEDED: number of LABs] | — |
| Propagation Delay (tPD) | 40 ns | — |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX value] | 50 MHz |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Total Inputs / Outputs | 72 inputs / 64 outputs | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Nominal Supply Voltage | 5 V | — |
| Plage de température de fonctionnement | 0 °C to +70 °C (commercial) | — |
| Boîtier | PQFP-100 (Plastic Quad Flat Pack) | — |
| Terminal Pitch | 0.635 mm | — |
| Technology | CMOS, UV-Erasable / OTP EPROM | — |
| Configuration Method | One-Time Programmable (OTP) / UV-Erasable | — |
| Type de montage | Surface Mount | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | unknown |
| Logic Array Blocks (LABs) | — | 12 |
| External Clock Inputs | — | 1 |
| Propagation Delay (PIA, typical) | — | 45 ns |
| Process Technology | — | CMOS |
| Configuration Memory | — | EEPROM (non-volatile) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Speed Grade | — | -2 |
| Programming Interface | — | JTAG / Altera MAX+ programming |