EPM5192AQM100-15 vs EPM5192AGC-15 Comparaison
Comparaison détaillée côte à côte de EPM5192AQM100-15 par Altera et EPM5192AGC-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192AQM100-15 | EPM5192AGC-15 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $16,20 | $27,80 |
| Family | MAX 5000 | — |
| Device Type | EPLD (Erasable PLD) | — |
| Logic Array Blocks (LABs) | 12 | — |
| Interconnect Architecture | Product Term Sharing (PIA) | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 7 |
| Total Inputs | 72 | 72 |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Speed Grade | -15 (15 ns macrocell delay) | — |
| Boîtier | PQFP-100 (R-PQFP-G100) | Ceramic Pin Grid Array (PGA) |
| Process Technology | CMOS | — |
| Programming Technology | EPROM (UV-erasable) | — |
| Tension d'alimentation | 5 V (typical, single supply) | — |
| Type de montage | Surface Mount | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Series | — | MAX 5000 |
| Macrocells | — | 192 |
| Logic Array Blocks | — | 16 (typical for 192-macrocell MAX 5000) |
| Maximum User I/O Pins | — | 64 |
| Propagation Delay (tPD) | — | 15 ns (pin-to-pin, -15 speed grade) |
| Supply Voltage (VCC) | — | 5 V |
| Technology | — | CMOS, UV-erasable EPROM |
| Programming Method | — | UV erase + EPROM program (via Altera programmer) |
| Statut du cycle de vie | — | Obsolete / Last Time Buy (per Altera legacy product list) |