EPM5192GI84 vs EPM5192GC-2 Comparaison
Comparaison détaillée côte à côte de EPM5192GI84 par Altera et EPM5192GC-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192GI84 | EPM5192GC-2 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $19,80 | $92,00 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-Erasable / OTP Complex PLD (CPLD) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks | [DATA_NEEDED: number of LABs] | 16 (LABs of 16 macrocells each) |
| Boîtier | 84-pin PGA (WPGA, square, through-hole, pin/peg terminals) | — |
| Package Code | WPGA | — |
| Operating Voltage (VCC) | 5 V (typical) | — |
| I/O Logic Compatibility | TTL | — |
| Temperature Grade | Industrial | — |
| Programmable Flip-Flop Modes | D, T, JK, SR | — |
| Programmability | UV-erasable (windowed) / OTP | — |
| Programming File Format | JEDEC map via MAX+PLUS II / A+PLUS | — |
| Propagation Delay | [DATA_NEEDED: tPD in ns] | — |
| Max User I/O Pins | [DATA_NEEDED: usable I/O count for this package] | — |
| Plage de température de fonctionnement | -40 C to +85 C (industrial) | — |
| Type de montage | Through-Hole (PGA socket or PCB pin/peg) | Through-hole (PGA socket) |
| Statut RoHS | [DATA_NEEDED: most legacy PGA parts are non-RoHS] | Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) |
| Lead-Free | [DATA_NEEDED: legacy part, likely contains lead] | — |
| Number of Terminals | 84 | — |
| Terminal Form | PIN/PEG | — |
| Package Shape | SQUARE | — |
| Usable I/O Pins | — | [DATA_NEEDED: exact user I/O count for PGA package] |
| Propagation Delay (tPD) | — | 12 ns typical (-2 grade) |
| Counter Frequency | — | 100 MHz minimum |
| Supply Voltage (VCC) | — | 5 V nominal |
| Technology | — | CMOS EPROM |
| Programmable Technology | — | UV-erasable / one-time programmable |
| Programming Toolchain | — | Altera MAX+PLUS II |
| Package Type | — | Pin Grid Array (PGA), ceramic |
| Température de fonctionnement | — | Commercial (0C to +70C) |
| Speed Grade | — | -2 |