EPM570M100I5N vs EPM570M100C5N Comparaison
Comparaison détaillée côte à côte de EPM570M100I5N par Intel et EPM570M100C5N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM570M100I5N | EPM570M100C5N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,75 | $11,85 |
| Family | MAX II | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | 440 | — |
| Number of Logic Array Blocks | 4 LABs (110 macrocells each) | — |
| Maximum Operating Frequency | 201.1 MHz | — |
| Pin-to-Pin Logic Delay | 5.4 ns | — |
| User I/Os | 76 | 76 |
| User Flash Memory | 8 Kbits | — |
| Process Technology | 0.18 µm CMOS | 0.18 um, 6-layer-metal flash |
| Supply Voltage - Core (VCCINT) | 2.5 V / 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked) | — |
| Package Type | 100-MBGA (Micro FBGA) | — |
| Package Size | 6 x 6 mm, 0.5 mm pitch | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Température de fonctionnement | -40°C to +100°C (I5 grade) | — |
| Lead-Free / RoHS | Lead Free, RoHS Compliant | — |
| Programmability | In-System via JTAG (IEEE 1149.1), non-volatile | — |
| Design Software | Altera Quartus II / Quartus Prime | — |
| Series | — | EPM570 |
| Macrocell Count | — | 440 |
| Logic Elements | — | 570 |
| Number of Logic Blocks / Array Blocks | — | [DATA_NEEDED: number of LABs] |
| Nombre de broches | — | 100 |
| Boîtier | — | 100-MBGA (FineLine BGA, 6 x 6 mm, 0.5 mm pitch) |
| Maximum Frequency (fMAX) | — | 201.1 MHz |
| Pin-to-Pin Propagation Delay | — | 5.4 ns |
| Operating Supply Voltage (Core) | — | 2.5 V / 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| On-Chip User Flash Memory (UFM) | — | 8 Kbits |
| Programming Interface | — | JTAG (IEEE 1149.1) and ISP |
| Plage de température de fonctionnement | — | 0 C to +85 C (Commercial) |
| Statut RoHS | — | Lead-Free / Compliant |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |