EPM7096LC84-15 vs EPM7096LI68-15 Comparaison
Comparaison détaillée côte à côte de EPM7096LC84-15 par Altera et EPM7096LI68-15 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM7096LC84-15 | EPM7096LI68-15 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,85 | $9,85 |
| Family | MAX 7000 | MAX 7000 (second-generation MAX architecture) |
| Series | MAX 7000 (second-generation MAX architecture) | — |
| Macro Cells | 96 | — |
| Logic Array Blocks (LABs) | 4 | 4 |
| Usable Gates | 1,800 | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 76.9 MHz | — |
| User I/O Pins | 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) | 52 |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Programmable Type | EE PLD (in-system programmable via JTAG) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | IEEE Std. 1149.1 JTAG |
| Température de fonctionnement | 0C to +70C (commercial) | — |
| Boîtier / Format | 84-PLCC (J-Lead) | — |
| Supplier Device Package | 84-PLCC (29.31 x 29.31 mm) | — |
| Type de montage | Surface Mount | Surface Mount (J-lead) |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Erase/Program Endurance | [DATA_NEEDED: erase/program cycle count] | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Macrocells | — | 96 |
| Propagation Delay (tPD) | — | 15 ns |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Programmable Logic Type | — | EEPROM-based, in-system programmable (ISP) |
| Boundary-Scan Test (BST) | — | Built-in JTAG BST circuitry |
| Output Option | — | Open-drain output option available |
| Operating Temperature Grade | — | Industrial (-40C to +85C) |
| Boîtier | — | 68-pin PLCC (J-lead, QCCJ) |
| Speed Grade | — | -15 (15 ns tPD) |
| Process Technology | — | CMOS EEPROM |