EPM7128ATC144-10 vs EPM7128BTC144-7 Comparaison
Comparaison détaillée côte à côte de EPM7128ATC144-10 par Altera et EPM7128BTC144-7 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM7128ATC144-10 | EPM7128BTC144-7 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,10 | $9,85 |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 7000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Programmable Type | EE PLD (EEPROM-based, in-system programmable) | — |
| Macrocells | 128 | — |
| Logic Array Blocks | 4 | — |
| User I/O Pins | 68 | 100 (per 144-pin TQFP package) |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 98 MHz | — |
| Supply Voltage - Internal (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Voltage Levels | 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) | — |
| In-System Programmability | Yes (IEEE Std 1149.1 JTAG) | — |
| Température de fonctionnement | 0C to +70C (commercial) | — |
| Boîtier / Format | 144-TQFP (20 x 20 mm) | — |
| Type de montage | Surface Mount | Surface Mount |
| Architecture | Multiple Array Matrix (MAX), 2nd generation | — |
| Statut RoHS | unknown (legacy Altera device) | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 7000B |
| Macro Cells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 |
| Pin-to-Pin Delay (tPD) | — | 7.5 ns |
| Maximum Counter Frequency (fCNT) | — | 126.6 MHz |
| Maximum Operating Frequency | — | 175 MHz (family typical) |
| Supply Voltage (VCCINT) | — | 2.5 V |
| I/O Bank Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (multiVolt) |
| Configuration Memory | — | EEPROM (non-volatile, ISP) |
| Programmability | — | IEEE 1149.1 JTAG (ISP) |
| Operating Temperature (Commercial) | — | 0C to +90C |
| Boîtier | — | 144-pin TQFP |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |