EPM7192SQI160-10N vs EPM7192SQC160-10 Comparaison
Comparaison détaillée côte à côte de EPM7192SQI160-10N par Intel et EPM7192SQC160-10 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM7192SQC160-10 - 192-Macro MAX 7000S CPLD, 100MHz, PQFP-160 | Intel / Altera
EPM7192SQC160-10 NrndComparaison des spécifications
| Paramètre | EPM7192SQI160-10N | EPM7192SQC160-10 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $35,90 | $18,25 |
| Series | MAX 7000S | — |
| Family | MAX 7000 | MAX 7000S |
| Architecture | Second-generation MAX (CMOS, EEPROM) | — |
| Logic Elements / Macrocells | 192 macrocells | — |
| Usable Gates | 3.75K (typical) | 3750 |
| User I/Os | 124 | 124 |
| Nombre de broches | 160 | — |
| Boîtier | PQFP-160 (QFP-160, plastic) | PQFP-160 (SQC) 28x28 mm |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 167 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| Supply Voltage (VCCIO) | 5.0 V | — |
| In-System Programmability | Yes (5V ISP, JTAG) | Yes (JTAG IEEE 1149.1) |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | — |
| Température de fonctionnement | 0C to +70C (industrial, 'N' suffix) | — |
| Type de montage | Surface Mount | — |
| Technology | 5V CMOS, EEPROM configuration memory | — |
| Logic Family | CMOS | — |
| Propagation Delay | 7.5 ns to 10 ns (speed grade dependent) | — |
| Statut RoHS | Compliant (per lead-free PQFP package marking) | [DATA_NEEDED: RoHS status] |
| Macrocells | — | 192 |
| Logic Array Blocks (LABs) | — | 4 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Program Memory Type | — | EEPROM |
| Pin/Package Type | — | Surface Mount, Gull-Wing |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Lead Finish | — | [DATA_NEEDED: lead finish] |