EPM7256AEFI100-7 vs EPM7256AETC100-10N Comparaison
Comparaison détaillée côte à côte de EPM7256AEFI100-7 par Intel et EPM7256AETC100-10N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM7256AETC100-10N - 256-Macro MAX 7000A CPLD, 10ns, TQFP-100 | Intel (Altera)
EPM7256AETC100-10N ObsoleteComparaison des spécifications
| Paramètre | EPM7256AEFI100-7 | EPM7256AETC100-10N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $65,40 | $13,10 |
| Logic Family | MAX 7000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | 256 | — |
| Number of Usable Gates | 5K | — |
| Number of User I/O | 84 | — |
| Pin-to-Pin Delay (Speed Grade) | 7.5 ns | — |
| Maximum Operating Frequency | 126.6 MHz | 125 MHz |
| Core Supply Voltage | 3.3 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5.0 V | 2.5 V / 3.3 V / 5.0 V |
| Programmability | In-system programmable (ISP) via JTAG | EEPROM, in-system via JTAG (IEEE 1149.1) |
| Boîtier | 100-ball FBGA (FineLine BGA), 11x11 mm | 100-pin TQFP |
| Operating Temperature Range (Industrial) | -40 C to +85 C | — |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Not Compliant (per Arrow listing) | [DATA_NEEDED: not confirmed in provided data] |
| Family | — | MAX 7000A |
| Macro Cells | — | 256 |
| Usable Gates | — | 5,000 |
| Maximum User I/Os | — | 84 |
| Logic Elements / LABs | — | 16 Logic Array Blocks |
| Pin-to-Pin Logic Delay | — | 10 ns |
| Supply Voltage (Core) | — | 3.3 V |
| Plage de température de fonctionnement | — | 0C to +70C (commercial) [DATA_NEEDED: explicit grade from datasheet] |
| Process Technology | — | 0.30 µm EEPROM |
| Dedicated Inputs | — | 4 (global clock / clear / OE) |
| Lead-Free / Pb-Free | — | [DATA_NEEDED: not confirmed in provided data] |