EPM7256SQC208-15N vs EPM7256BQC208-7 Comparaison
Comparaison détaillée côte à côte de EPM7256SQC208-15N par Altera et EPM7256BQC208-7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM7256SQC208-15N | EPM7256BQC208-7 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $9,75 |
| Series | MAX 7000S | — |
| Macrocells | 256 | — |
| User I/O Pins | 164 | — |
| Pin-to-Pin Delay | 15 ns (speed grade -15) | — |
| Tension d'alimentation | 5 V | — |
| Boîtier | 208-pin PQFP | 208-pin PQFP |
| Type de montage | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | Non-volatile EEPROM |
| JTAG Interface | IEEE 1149.1 boundary-scan | — |
| In-System Programmability | Yes (ISP) | Yes (via JTAG) |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0C to +90C (commercial) |
| Statut RoHS | Lead free / RoHS Compliant | Compliant per distributor listings |
| Logic Array Blocks | 16 macrocells per LAB | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Speed Grade | -15 | — |
| Product Category | CPLD - Complex Programmable Logic Devices | — |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Family | — | MAX 7000B |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Usable Gates | — | 5,000 |
| Macro Cells | — | 256 |
| User I/Os | — | 164 |
| Logic Elements / LABs | — | 16 Logic Array Blocks |
| Maximum Internal Frequency | — | 126.6 MHz |
| Propagation Delay (tPD) | — | 7.5 ns (-7 speed grade) |
| Core Supply Voltage | — | 2.5 V |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |