EPM7256SRC208-10 vs EPM7256SQC208-7 Comparaison
Comparaison détaillée côte à côte de EPM7256SRC208-10 par Intel et EPM7256SQC208-7 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM7256SRC208-10 | EPM7256SQC208-7 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $27,20 | $0,00 |
| Family | MAX 7000S | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Number of Macrocells | 256 | — |
| Number of Logic Array Blocks (LABs) | 16 | — |
| Number of Gates | 5000 | — |
| Number of User I/O Pins | 164 | — |
| Maximum Propagation Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 100 MHz | — |
| Supply Voltage (Internal) | 4.75 V to 5.25 V | — |
| Programmable Type | In System Programmable (ISP, JTAG) | — |
| Configuration Technology | EEPROM | EEPROM (non-volatile) |
| Boîtier | 208-pin RQFP (BFQFP) exposed pad, 28x28 mm | 208-pin PQFP (28 x 28 mm, 0.5 mm pitch) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0C to +70C (TA, commercial) | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| Product Status | Obsolete | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 7000S (EPM7256S) |
| Macrocells | — | 256 |
| Usable Gates | — | 5,000 |
| User I/O Pins | — | 164 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Operating Frequency (fMAX) | — | 128.2 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Plage de température de fonctionnement | — | Commercial (0C to +70C) |
| Minimum DC Input Voltage | — | -0.5 V |
| Input Undershoot Tolerance | — | -2.0 V for <100 mA, <20 ns |
| Speed Grade | — | -7 (7.5 ns) |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Logic Levels | — | 5.0 V CMOS/TTL compatible |