EPM7256SRI208-10 vs EPM7256SQC208-15 Comparaison
Comparaison détaillée côte à côte de EPM7256SRI208-10 par Intel et EPM7256SQC208-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM7256SRI208-10 | EPM7256SQC208-15 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $27,20 | $3,65 |
| Logic Family | MAX 7000S (EEPROM-based CPLD) | — |
| Macrocells | 256 | 256 |
| Logic Array Blocks | 16 | — |
| Usable Gates | 5,000 | 5000 |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 100 MHz | — |
| Supply Voltage (Internal) | 4.5 V to 5.5 V | — |
| Logic Family Technology | CMOS | — |
| Programmable Type | In-System Programmable (ISP) via JTAG | — |
| Boîtier | 208-pin RQFP (PowerQuad) | 208-pin PQFP (28x28 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Plage de température de fonctionnement | Industrial (-40C to +85C) | 0 C to +70 C (Commercial) |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| JTAG Boundary Scan | Yes (BST circuitry) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Contains lead / RoHS non-compliant (per third-party listing) |
| Packaging | Tray | — |
| Family | — | MAX 7000S |
| Series | — | EPM7256 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Programmable Power Mode | — | Yes (per-macrocell turbo-bit) |
| JTAG (IEEE 1149.1) Boundary-Scan | — | Yes |
| In-System Programmability (ISP) | — | Yes |
| Lead-Free Status | — | Contains lead |