EPM9560RC-15 vs EPM9320ARI208-10 Comparaison
Comparaison détaillée côte à côte de EPM9560RC-15 par Altera et EPM9320ARI208-10 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM9560RC-15 - 560-Macrocell MAX 9000 CPLD, 15ns, 240-RQFP | Altera / Intel
EPM9560RC-15 ⚠ Dernier achat
Comparaison des spécifications
| Paramètre | EPM9560RC-15 | EPM9320ARI208-10 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $30,10 | $27,20 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | — |
| Logic Array Blocks (LABs) | 16 (40 macrocells each) | — |
| Maximum User I/O Pins | 191 | — |
| Pin-to-Pin Delay (tPD1) | 15 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5.0 V nominal) | — |
| Température de fonctionnement | 0 C to +70 C (commercial) | -40 C to +85 C (TA) |
| Boîtier | 240-pin RQFP (32x32 mm) | — |
| Type de montage | Surface Mount | Surface Mount |
| Programming Interface | IEEE Std. 1149.1 JTAG (ISP) | — |
| Process Technology | CMOS EEPROM | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| In-System Programmability | Yes (5.0 V ISP via JTAG) | — |
| Programmable Type | — | In System Programmable (ISP) |
| Number of Macrocells | — | 320 |
| Number of Logic Elements/Blocks | — | 20 |
| Number of Gates | — | 6000 |
| Number of I/O | — | 132 |
| Propagation Delay tpd(1) Max | — | 10 ns |
| Maximum Counter Frequency | — | 144.9 MHz |
| Voltage Supply - Internal | — | 4.5 V to 5.5 V |
| Boîtier / Format | — | 208-BFQFP Exposed Pad |
| Supplier Device Package | — | 208-RQFP |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| PCI Compliance | — | PCI Local Bus Specification Rev 2.2 |
| Product Status | — | Obsolete |
| Packaging | — | Tray |