EPM9560RC208-4 vs EPM9560RC208-10 Comparaison
Comparaison détaillée côte à côte de EPM9560RC208-4 par Altera et EPM9560RC208-10 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM9560RC208-4 | EPM9560RC208-10 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $62,00 | $15,40 |
| Family | MAX 9000 | MAX 9000 |
| Device | EPM9560 | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum Operating Frequency | 118.3 MHz | — |
| Pin-to-Pin Delay (tPD) | 4 ns | 10 ns |
| Speed Grade | -4 | — |
| Supply Voltage (VCC) | 5 V | — |
| Boîtier | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Plastic Quad Flat Pack) |
| User I/O Pins | 96 (approx., 208-pin RQFP) | — |
| Dedicated Inputs | 16 | — |
| Programming Interface | IEEE 1149.1 JTAG (ISP) | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (in-system programmable via JTAG) |
| MultiVolt I/O | 5.0 V / 3.3 V / 2.5 V | — |
| Température de fonctionnement | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: not stated in retrieved distributor listings] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum User I/O Pins | — | 212 (208-pin package variant) |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: internal toggle frequency in MHz] |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standards Supported | — | 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) |
| Process Technology | — | 0.30 µm CMOS EEPROM |
| Type de montage | — | Surface Mount |
| Lead-Free | — | [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] |
| Programmability | — | JTAG (IEEE 1149.1) in-system programming |