EPM9560RC304-15C vs EPM9560RC304-15F Comparaison
Comparaison détaillée côte à côte de EPM9560RC304-15C par Altera et EPM9560RC304-15F par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoleteAltera
EPM9560RC304-15F - 560-Macrocell MAX 9000 CPLD, 5V, RQFP-304 | Intel
EPM9560RC304-15F ObsoleteComparaison des spécifications
| Paramètre | EPM9560RC304-15C | EPM9560RC304-15F |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $24,50 | $18,75 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX), 3rd generation | Multiple Array MatriX (MAX) with PIA interconnect |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | — |
| Logic Array Blocks (LABs) | 16 | 16 (40 macrocells each) |
| User I/O Pins (maximum) | 212 | — |
| Maximum Operating Frequency | 117.6 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Tension d'alimentation | 5.0 V | — |
| Process Technology | CMOS EEPROM | High-performance CMOS, EEPROM-based |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Program/Erase Endurance | 100 cycles minimum | — |
| Boîtier | 304-pin RQFP | RQFP-304 (304-pin Plastic QFP) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0 C to +70 C (Commercial) | -40C to +85C (industrial) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status - not stated in source] |
| Device Family | — | MAX 9000 |
| Series | — | EPM9560 |
| Macrocells | — | 560 |
| Propagation Delay (tpd) | — | 16.6 ns (max) |
| Maximum Internal Frequency | — | 117.6 MHz |
| Core Supply Voltage | — | 5.0 V |
| User I/O Pins | — | 212 |
| Dedicated Inputs | — | 4 |
| Programming Technology | — | 5.0 V in-system EEPROM via JTAG (IEEE 1149.1) |
| Boundary Scan Test (BST) | — | Yes, JTAG-compliant |
| Niveau MSL | — | 3 (168 hours) |