EPM9560RC304-2N vs EPM9560RC304-15C Comparaison
Comparaison détaillée côte à côte de EPM9560RC304-2N par Intel et EPM9560RC304-15C par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoleteComparaison des spécifications
| Paramètre | EPM9560RC304-2N | EPM9560RC304-15C |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $149,00 | $24,50 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | 16 |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | — |
| Boîtier | RQFP/RBGA-class 304-pin plastic carrier (RC304) | 304-pin RQFP |
| Speed Grade | -2 (mid-band) | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD value in ns] | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Voltage Tolerance | 5.0 V (3.3 V with level shifting) | — |
| Programming Technology | EPROM/EEPROM, non-volatile | — |
| In-System Programming | IEEE 1149.1 JTAG | — |
| Température de fonctionnement | 0C to +70C (commercial) | 0 C to +70 C (Commercial) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | — | Multiple Array MatriX (MAX), 3rd generation |
| Macro Cells | — | 560 |
| User I/O Pins (maximum) | — | 212 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Tension d'alimentation | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Program/Erase Endurance | — | 100 cycles minimum |