EPM9560RI240-15 vs EPM9560RI240-10 Comparaison
Comparaison détaillée côte à côte de EPM9560RI240-15 par Intel et EPM9560RI240-10 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPM9560RI240-15 - 560-Macrocell MAX 9000 CPLD, 15ns, RQFP-240 | Intel
EPM9560RI240-15 ObsoleteComparaison des spécifications
| Paramètre | EPM9560RI240-15 | EPM9560RI240-10 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $23,10 | $0,00 |
| Product Type | EE PLD (Electrically Erasable Programmable Logic Device) | — |
| Family | MAX 9000 | MAX 9000 |
| Macrocells | 560 | — |
| Flip-Flops | 772 | — |
| User I/Os (industrial grade) | 191 | — |
| Dedicated Inputs | 4 | — |
| Propagation Delay (tPD) | 15 ns (speed grade -15) | 10 ns (speed grade -10) |
| Internal Frequency (max) | 145 MHz | — |
| Logic Family / Process | CMOS, EEPROM-based | — |
| Core Voltage | 5.0 V | — |
| I/O Voltage | 3.3 V or 5.0 V (configurable) | — |
| Architecture | Multiple Array MatriX (MAX), 3rd generation | — |
| Boîtier | RQFP-240 (Power Quad Flat Pack, gull-wing, 0.500 mm pitch) | RQFP-240 (Power Quad Flat Pack) |
| Type de montage | Surface Mount | — |
| Température de fonctionnement | -40 C to +85 C (industrial) | [DATA_NEEDED: operating temperature range] |
| In-System Programmability | Yes, JTAG (IEEE Std 1149.1) | — |
| Power-Up Configuration | Instant-on (no external boot PROM) | — |
| I/O Undershoot Tolerance | -2.0 V for <20 ns (no-load) | — |
| I/O Overshoot Tolerance | 7.0 V for <20 ns (no-load) | — |
| Device | — | EPM9560 |
| Logic Elements / Macrocells | — | 560 macrocells |
| Usable Gates | — | 12,000 |
| Maximum Internal Frequency | — | 144.9 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| Technology | — | CMOS, EEPROM-based |
| User I/Os | — | 240 pins |
| Programming Interface | — | JTAG (IEEE 1149.1) + ByteBlaster |
| Non-Volatile Memory | — | Yes (EEPROM) |
| In-System Programmable | — | Yes |
| Statut RoHS | — | [DATA_NEEDED: RoHS compliance status] |