EPM9560RI304-15N vs EPM9560RI304-20 Comparaison
Comparaison détaillée côte à côte de EPM9560RI304-15N par Altera et EPM9560RI304-20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM9560RI304-15N - 560-Macrocell MAX 9000 CPLD, 15ns, RQ304 | Altera
EPM9560RI304-15N ObsoleteIntel
EPM9560RI304-20 - 560 Macrocell MAX 9000 CPLD, 20ns, RQFP-304 | Intel
EPM9560RI304-20 ObsoleteComparaison des spécifications
| Paramètre | EPM9560RI304-15N | EPM9560RI304-20 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $88,75 | $18,50 |
| Family | MAX 9000 | — |
| Series / Part Number | EPM9560 | — |
| Device Type | CPLD (EE PLD), in-system programmable, EEPROM-based | — |
| Macrocells | 560 | — |
| Flip-Flops | 772 | — |
| Logic Array Blocks (LABs) | 16 | 16 (max) |
| User I/Os | 216 | — |
| Maximum Internal Frequency | 145 MHz | — |
| Propagation Delay (pin-to-pin) | 15 ns (speed grade -15) | — |
| Tension d'alimentation | 5.0 V core, multi-volt I/O (3.3 V / 5.0 V) | — |
| Process Technology | High-performance CMOS, EEPROM configuration memory | — |
| Boîtier | RQFP-304 (HFQFP-304), 1.27 mm gull-wing pitch | 304-pin RQFP (Plastic Quad Flat Pack) |
| Nombre de broches | 304 | — |
| Operating Temperature (commercial) | 0 C to 70 C | — |
| Programming Interface | JTAG (IEEE 1532 / IEEE 1149.1) in-system programmable | — |
| Architecture | Multiple Array MatriX (MAX), third-generation, PIA interconnect | Multiple Array MatriX (MAX) - 3rd generation |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free / RoHS status of EPM9560RI304-15N] | — |
| Device Family | — | MAX 9000 |
| Macrocell Count | — | 560 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Maximum User I/O Pins | — | 212 |
| Supply Voltage (VCC) | — | 5.0 V |
| Programmable Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes, via JTAG (IEEE 1149.1) |
| Boundary Scan | — | IEEE Std. 1149.1 JTAG |
| Type de montage | — | Surface Mount |
| Température de fonctionnement | — | [DATA_NEEDED: industrial/commercial range] |
| Reprogram Cycles | — | 100+ (EEPROM) |
| Statut RoHS | — | [DATA_NEEDED: lead-free / RoHS variant] |