H5CG24AGBDX022 vs H5CG24AGBDX022N Comparaison
Comparaison détaillée côte à côte de H5CG24AGBDX022 par SK hynix et H5CG24AGBDX022N par SK hynix. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | H5CG24AGBDX022 | H5CG24AGBDX022N |
|---|---|---|
| Marque | SK hynix | SK hynix |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Type de mémoire | DDR5 SDRAM | DDR5 SDRAM |
| Manufacturer Series | H5CG Series (SK hynix DDR5) | — |
| Supply Voltage VDD | 1.1 V (DDR5 nominal, per SK hynix DDR5 family) | — |
| Organisation de la mémoire | [DATA_NEEDED: die organization (x8/x16)] | [DATA_NEEDED: x8 or x16] |
| Density | [DATA_NEEDED: die density (Gb)] | 16 Gbit (2 GB) |
| Speed Grade | [DATA_NEEDED: DDR5 speed bin (Mbps)] | — |
| Débit de données | [DATA_NEEDED: data transfer rate] | [DATA_NEEDED: data rate / speed bin] |
| Latence CAS | [DATA_NEEDED: CL at rated speed bin] | [DATA_NEEDED: CL value] |
| Bank Count | 32 banks / 8 bank groups (DDR5 architecture) | — |
| Burst Length | 16 (BL16, DDR5 standard) | — |
| ECC | On-die ECC (DDR5 standard feature) | — |
| Package Type | [DATA_NEEDED: FBGA ball count / package code] | [DATA_NEEDED: FBGA package code and body size] |
| Température de fonctionnement | [DATA_NEEDED: commercial/industrial range] | [DATA_NEEDED: operating temperature range] |
| Type d'interface | DDR5 (DFE-based receiver) | SSTL / POD (DDR5 per JEDEC) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance statement] | unknown |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| JEDEC Standard | DDR5 SDRAM JEDEC standard compatible | — |
| Manufacturer | — | SK hynix |
| Product Family | — | H5CG24 series DDR5 SDRAM |
| VDD Supply Voltage | — | [DATA_NEEDED: VDD value] |
| VDDQ Supply Voltage | — | [DATA_NEEDED: VDDQ value] |
| Bank Groups | — | [DATA_NEEDED: bank group count] |
| On-Die ECC | — | Yes (DDR5 generation feature) |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |