IDTADC1215S080HN-C18 vs ADC1112D125HN-C18 Comparaison
Comparaison détaillée côte à côte de IDTADC1215S080HN-C18 par Renesas Electronics et ADC1112D125HN-C18 par Renesas Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Renesas Electronics
IDTADC1215S080HN-C18 - 12-Bit 80 MSPS 1-Channel ADC | IDT/Renesas
IDTADC1215S080HN-C18 ✓ ActifRenesas Electronics
ADC1112D125HN-C18 - Dual 11-bit 125MSPS ADC, LVDS/CMOS | Renesas
ADC1112D125HN-C18 ✓ ActifComparaison des spécifications
| Paramètre | IDTADC1215S080HN-C18 | ADC1112D125HN-C18 |
|---|---|---|
| Marque | Renesas Electronics | Renesas Electronics |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,95 | $9,48 |
| Résolution | 12 bit | 11-bit |
| Number of Channels | 1 | 2 (dual, simultaneous sampling) |
| Fréquence d'échantillonnage | 80 MSPS | — |
| Architecture | Pipelined | — |
| Input Type | Differential | Single-ended analog inputs (per channel) |
| Boîtier | 40-VFQFPN (HVQFN) 6x6 mm with exposed pad | HVQFN-64 (8x8 mm with exposed thermal pad) |
| Type de montage | Surface Mount | Surface Mount |
| Plage de température de fonctionnement | -40C to +85C (industrial) | -40 C to +85 C |
| Analog Supply Voltage | 3.3 V (typical, [DATA_NEEDED: exact min/max]) | — |
| Digital Supply Voltage | 3.3 V or 1.8 V (typical, [DATA_NEEDED: exact min/max]) | — |
| Data Interface | [DATA_NEEDED: LVDS / parallel CMOS] | — |
| Input Bandwidth | [DATA_NEEDED: MHz] | — |
| SFDR | [DATA_NEEDED: dBc] | — |
| SNR | [DATA_NEEDED: dBFS] | — |
| Power Dissipation | [DATA_NEEDED: mW at 80 MSPS] | — |
| Statut RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | 3 (168 hours) |
| Sample Rate (Max) | — | 125 Msps |
| Analog Supply Voltage (AVDD) | — | 3.0 V to 3.6 V |
| Digital I/O Supply (OVDD) | — | 1.8 V to 3.3 V |
| Output Interface | — | CMOS or LVDS DDR (selectable) |
| Reference | — | Internal programmable (0-6 dB in 1 dB steps) or external |
| Control Interface | — | SPI (3-wire, mode configuration) |
| Power-Down Mode | — | Yes, per-channel via SPI |