KAD2708L-21Q68 vs KAD2708L-35Q68 Comparaison
Comparaison détaillée côte à côte de KAD2708L-21Q68 par Renesas Electronics et KAD2708L-35Q68 par Renesas Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Renesas Electronics
KAD2708L-21Q68 - 8-bit 210MSPS LVCMOS ADC, 68-QFN | Renesas
KAD2708L-21Q68 ✓ ActifRenesas Electronics
KAD2708L-35Q68 - 8-bit, 350MSPS Single-Channel ADC | Renesas
KAD2708L-35Q68 ✓ ActifComparaison des spécifications
| Paramètre | KAD2708L-21Q68 | KAD2708L-35Q68 |
|---|---|---|
| Marque | Renesas Electronics | Renesas Electronics |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $22,50 | $19,50 |
| Résolution | 8 bit | 8 bits |
| Fréquence d'échantillonnage | 210 MSPS | — |
| Number of Channels | 1 | 1 (single-channel) |
| Architecture | Pipelined (FemtoCharge™ technology) | Pipelined, FemtoCharge CMOS |
| Digital Output Type | LVCMOS | — |
| Input Clock Divider | Selectable divide-by-2 | — |
| Analog Supply Voltage (AVDD2) | 1.8 V | — |
| Digital Supply Voltage (AVDD3) | 3.3 V | — |
| Power Consumption | [DATA_NEEDED: power at 210 MSPS in mW] (< 330 mW family typical) | — |
| SNR at fIN = 175 MHz | 48.8 dBFS | — |
| Over-Range Indicator | Yes | Yes |
| Boîtier | 68-QFN (10x10 mm) | 68-Ld QFN (10 mm × 10 mm) with exposed paddle |
| Type de montage | Surface Mount | Surface Mount |
| Plage de température de fonctionnement | [DATA_NEEDED: industrial/extended range] | -40 °C to +85 °C |
| Statut RoHS | Compliant | Compliant (Pb-free matte tin plate) |
| Family Pin-Compatibility | Pin-compatible with KAD2708L (8-bit) and KAD2710C (10-bit) at 105-350 MSPS | — |
| Process Technology | Standard CMOS with FemtoCharge™ | — |
| Sample Rate (max) | — | 350 MSPS |
| Input Voltage Range (Differential) | — | 1.5 VP-P |
| Analog Input Bandwidth | — | 600 MHz |
| SNR (fIN = 175 MHz) | — | 48.8 dBFS |
| Power Consumption (typ) | — | < 330 mW |
| Digital Output Interface | — | LVCMOS, parallel |
| Output Coding | — | Two's complement |
| AVDD2 Supply | — | 1.8 V |
| AVDD3 Supply | — | 3.3 V |
| Internal Reference | — | Yes (on-chip) |
| Track-and-Hold | — | Internal |
| Clock Divider | — | Selectable divide-by-2 |
| Niveau MSL | — | Per datasheet TB363 |