KSZ8995MAI vs KSZ8995FQI Comparaison
Comparaison détaillée côte à côte de KSZ8995MAI par Microchip Technology et KSZ8995FQI par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
KSZ8995MAI - 5-Port 10/100 Managed Ethernet Switch | Microchip
KSZ8995MAI ✓ ActifMicrochip Technology
KSZ8995FQI - 5-Port 10/100 Managed Ethernet Switch | Microchip
KSZ8995FQI ✓ ActifComparaison des spécifications
| Paramètre | KSZ8995MAI | KSZ8995FQI |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | Interface ICs | Interface ICs |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $5,95 | $14,00 |
| Product Type | Layer-2 Managed 5-Port 10/100 Ethernet Switch | — |
| Number of Ports | 5 (4 external + 1 MAC-port) | 5 |
| Switch Bandwidth | 1.4 Gbps non-blocking | — |
| Standards Compliance | IEEE 802.3, IEEE 802.3u | IEEE 802.3, IEEE 802.3u |
| Tension d'alimentation | 3.15 V to 3.45 V (3.3 V typ) | 3.3 V (with internal 1.8V/2.5V regulators) |
| On-chip PHYs | 5 integrated 10/100BASE-TX transceivers | — |
| Auto-crossover | HP/MDI-X automatic | — |
| MAC Address Table | 1K entries | 1K entries [DATA_NEEDED: exact size not in provided data] |
| Frame Buffer | ~64 KB shared SRAM | Integrated [DATA_NEEDED: exact buffer size] |
| VLAN Support | Tag/port-based, up to 16 groups | Port-based + 802.1Q tag-based VLAN |
| QoS | 4 priority queues per port | 4 queues, hardware-based prioritization |
| MII Interfaces | Dual MII/RMII/SNI to external MAC or PHY | — |
| Management Interface | I2C, SPI, EEPROM | SPI, I2C, MDC/MDIO |
| Boîtier | 128-pin PQFP (14x20 mm) | 128-pin PQFP (14x20 mm) |
| Operating Temperature (Industrial 'I' suffix) | -40 C to +85 C | — |
| Reference Clock | 25 MHz, +/-50 ppm crystal/oscillator | — |
| Fonction | — | 5-Port 10/100 Mbps Managed Layer-2 Switch with integrated PHYs |
| Switch Architecture | — | Non-blocking wire-speed switching fabric |
| Port Speed | — | 10/100 Mbps (per port) |
| Fiber Support | — | 100BASE-FX on Port 5 (via external PHY) |
| On-chip Termination | — | Yes (reduces BOM) |
| IGMP Snooping | — | Yes (multicast management) |
| Température de fonctionnement | — | -40C to +85C (industrial) |
| Statut RoHS | — | Compliant (per Microchip product page) |