LC4032B-5T48C vs LFE2-20E-5F484C Comparaison
Comparaison détaillée côte à côte de LC4032B-5T48C par Lattice Semiconductor et LFE2-20E-5F484C par Lattice Semiconductor. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | LC4032B-5T48C | LFE2-20E-5F484C |
|---|---|---|
| Marque | Lattice Semiconductor | Lattice Semiconductor |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Unknown |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Product Type | ispMACH 4000B high-density in-system programmable PLD | — |
| Macrocell Count | 32 macrocells | — |
| Maximum Operating Frequency | 400 MHz | — |
| Propagation Delay | 2.5 ns | — |
| Supply Voltage Family | 3.3 V / 2.5 V / 1.8 V | — |
| Programming Type | In-system programmable | — |
| Device Family | ispMACH 4000 | — |
| Architecture Description | Blend of ispLSI 2000 and ispMACH 4A architectures | — |
| Boîtier | 48-pin TQFP | 484-BBGA |
| Logic Type | SuperFAST high-density PLD | — |
| Global Clock Inputs | [DATA_NEEDED: global clock input count] | — |
| I/O Standard | [DATA_NEEDED: I/O voltage standards] | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Type de montage | Surface mount | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: automotive qualification status] | — |
| Device Type | — | ECP2 Field Programmable Gate Array (FPGA) |
| Logic Cell Density | — | 21K LUTs |
| Input/Output Count | — | 331 I/O |
| Core Supply Voltage | — | 1.2 V |
| Speed Grade | — | -5 |
| DSP Capability | — | DSP |
| Package Type | — | BGA |
| Terminal Count | — | 484 balls |
| Programmable Device | — | Yes |
| FPGA Family | — | LatticeECP2 |
| Logic Technology | — | 90 nm CMOS |
| Configuration Method | — | [DATA_NEEDED: configuration method] |
| Fréquence d'horloge maximale | — | [DATA_NEEDED: maximum clock frequency] |