LC4032B-5T48I vs LC4032B-5T48C Comparaison
Comparaison détaillée côte à côte de LC4032B-5T48I par Lattice Semiconductor et LC4032B-5T48C par Lattice Semiconductor. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | LC4032B-5T48I | LC4032B-5T48C |
|---|---|---|
| Marque | Lattice Semiconductor | Lattice Semiconductor |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Unknown | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Device Type | In-system-programmable SuperFAST high-density PLD | — |
| Device Category | CPLD | — |
| Macrocells | 32 macrocells | — |
| Maximum Operating Frequency | 400 MHz | 400 MHz |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Supported Supply Levels | 3.3 V, 2.5 V, and 1.8 V | — |
| Global Clock Inputs | Up to 4 global clock pins | [DATA_NEEDED: global clock input count] |
| Clock Polarity | Programmable | — |
| Product Terms per Output | Up to 80 PTs | — |
| Configuration Method | In-system programmable | — |
| Boîtier | 48-lead TQFP | 48-pin TQFP |
| Type de montage | Surface mount | Surface mount |
| Speed Grade | -5 | — |
| Temperature Grade | Industrial suffix | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Core Supply Current | [DATA_NEEDED: core supply current] | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O supply voltage] | — |
| Type de mémoire | [DATA_NEEDED: configuration memory type] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification status] | [DATA_NEEDED: automotive qualification status] |
| Product Type | — | ispMACH 4000B high-density in-system programmable PLD |
| Macrocell Count | — | 32 macrocells |
| Supply Voltage Family | — | 3.3 V / 2.5 V / 1.8 V |
| Programming Type | — | In-system programmable |
| Device Family | — | ispMACH 4000 |
| Architecture Description | — | Blend of ispLSI 2000 and ispMACH 4A architectures |
| Logic Type | — | SuperFAST high-density PLD |
| I/O Standard | — | [DATA_NEEDED: I/O voltage standards] |