LC4064C-5T48C vs LC4064V-5T48C Comparaison

Comparaison détaillée côte à côte de LC4064C-5T48C par Lattice Semiconductor et LC4064V-5T48C par Lattice Semiconductor. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.

Lattice Semiconductor
LC4064C-5T48C LC4064C-5T48C - 64-Macrocell, 5ns In-System CPLD | Lattice

LC4064C-5T48C - 64-Macrocell, 5ns In-System CPLD | Lattice

LC4064C-5T48C ✓ Actif
Lattice Semiconductor
LC4064V-5T48C LC4064V-5T48C - 64-Macro-Cell 227 MHz CPLD | Lattice

LC4064V-5T48C - 64-Macro-Cell 227 MHz CPLD | Lattice

LC4064V-5T48C Obsolete

Comparaison des spécifications

Paramètre LC4064C-5T48C LC4064V-5T48C
Marque Lattice Semiconductor Lattice Semiconductor
Catégorie FPGA & CPLD FPGA & CPLD
Statut du cycle de vie Actif Obsolete
Device Type In-System Programmable SuperFAST High-Density PLD Complex Programmable Logic Device (CPLD)
Macrocells 64 macrocells —
Propagation Delay 2.5 ns —
Speed Grade 5 ns 5 ns class
Maximum Operating Frequency 400 MHz —
Supported Supply Voltages 3.3 V, 2.5 V, and 1.8 V —
Global Clock Inputs Up to 4 —
Programmable Clock Polarity Supported —
Product-Term Outputs Up to 80 —
Programming Interface In-System Programmable —
Boîtier 48-pin TQFP 48-pin TQFP
Distributor Package Terminology 48-LQFP —
Type de montage Surface Mount Surface mount
Plage de température de fonctionnement [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Maximum Input Voltage [DATA_NEEDED: maximum input voltage] —
Output Drive Current [DATA_NEEDED: output drive current] —
Configuration Memory Type [DATA_NEEDED: configuration memory technology] —
Statut RoHS [DATA_NEEDED: RoHS status] —
REACH Status [DATA_NEEDED: REACH status] —
Automotive Qualification [DATA_NEEDED: AEC-Q100 qualification status] —
Macro Cells — 64 macro cells
User I/O — 32 I/O
Maximum Frequency — 227 MHz
Supply Voltage Options — 3.3 V, 2.5 V, and 1.8 V
Programmable Logic Family — ispMACH 4000V family
Programming Type — In-System Programmable
Performance Class — SuperFAST high-density PLD
Shipping Package — Tray
Logic Density — 64 macro cells
Internal Flash Configuration — [DATA_NEEDED: configuration memory technology]
Courant d'alimentation — [DATA_NEEDED: typical and maximum supply current]
RoHS Compliance — [DATA_NEEDED: RoHS compliance status]
REACH Compliance — [DATA_NEEDED: REACH compliance status]

Fiches techniques et ressources

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