LCMXO3L-1300E-5UWG36CTR vs LCMXO3L-1300E-5UWG36C Comparaison
Comparaison détaillée côte à côte de LCMXO3L-1300E-5UWG36CTR par Lattice Semiconductor et LCMXO3L-1300E-5UWG36C par Lattice Semiconductor. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Lattice Semiconductor
LCMXO3L-1300E-5UWG36CTR - MachXO3 1280 LUTs FPGA 36-WLCSP
LCMXO3L-1300E-5UWG36CTR ✓ ActifLattice Semiconductor
LCMXO3L-1300E-5UWG36C - 1280 LUT MachXO3 FPGA, 36-WLCSP | Lattice
LCMXO3L-1300E-5UWG36C ✓ ActifComparaison des spécifications
| Paramètre | LCMXO3L-1300E-5UWG36CTR | LCMXO3L-1300E-5UWG36C |
|---|---|---|
| Marque | Lattice Semiconductor | Lattice Semiconductor |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3,55 | $4,50 |
| FPGA Family | MachXO3L | — |
| Number of Logic Elements / LUTs | 1280 LUTs | — |
| Number of Logic Cells | 1300 cells | — |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Core Voltage | 1.2 V | — |
| Embedded Block RAM (EBR) | 64 kbit (65 kbit per manufacturer source) | [DATA_NEEDED: number and size] |
| Distributed RAM | Yes | — |
| User Flash Memory (UFM) | Yes | — |
| Number of User I/O | 28 | 28 |
| Boîtier | 36-WLCSP (UWG), 0.4 mm ball pitch | 36-ball WLCSP (UWG) |
| Speed Grade | E (extended) | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range from data] | 0 °C to +85 °C |
| Type de montage | Surface Mount (WLCSP) | Surface Mount |
| Configuration Memory | Non-volatile, on-chip flash | Non-volatile (built-in flash) |
| Statut RoHS | Compliant | Compliant |
| Programming Tools | Lattice Diamond, Lattice Radiant | — |
| Family | — | MachXO3L |
| Logic Elements / LUTs | — | 1280 |
| Total RAM Bits | — | 65536 |
| Number of LABs / CLBs | — | 160 |
| Core Supply Voltage | — | 1.2 V |
| Temperature Grade | — | Commercial (C) |
| I/O Standards Supported | — | LVCMOS 1.2/1.5/1.8/2.5/3.3 V, LVDS |
| Embedded Hard IP | — | I2C, SPI, timer/counter, PLL |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Maximum Toggle Frequency | — | [DATA_NEEDED: fmax] |