LFE2-6E-6F256I vs LFE2-6E-5F256I Comparaison
Comparaison détaillée côte à côte de LFE2-6E-6F256I par Lattice Semiconductor et LFE2-6E-5F256I par Lattice Semiconductor. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Lattice Semiconductor
LFE2-6E-6F256I - 6K LUT FPGA, 190 I/O, 256-BGA | Lattice
LFE2-6E-6F256I ✓ ActifComparaison des spécifications
| Paramètre | LFE2-6E-6F256I | LFE2-6E-5F256I |
|---|---|---|
| Marque | Lattice Semiconductor | Lattice Semiconductor |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Device Type | ECP2 Field Programmable Gate Array (FPGA) | ECP2 Field Programmable Gate Array (FPGA) |
| Logic Elements | 6,000 | — |
| Equivalent Logic Blocks | 750 | — |
| Total RAM | 56,320 bits | — |
| General-Purpose User I/Os | 190 | — |
| Speed Grade | -6 | -5 |
| Supply Designation | 1.2 V | — |
| Temperature Designation | Industrial | — |
| Boîtier | 256-BGA | 256-ball Fine Pitch Ball Grid Array |
| Package Type | Fine-Pitch Ball Grid Array | — |
| Package Dimensions | 17 mm x 17 mm | 17 mm x 17 mm |
| Logic Resource Class | 6K LUT FPGA | — |
| DSP Feature | Advanced DSP blocks listed for the ECP2/M family | — |
| Type de montage | Surface Mount | Surface mount |
| Configuration | Field programmable | — |
| Manufacturer | Lattice Semiconductor Corporation | — |
| Product Family | ECP2 | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: automotive qualification status] | [DATA_NEEDED: AEC-Q100 qualification status] |
| Pinout | [DATA_NEEDED: complete 256-BGA pinout] | — |
| Logic Cells | — | 6,000 cells |
| User I/O | — | 190 I/O |
| Configuration Bits | — | 56,320 bits |
| Core Supply | — | 1.2 V |
| Temperature Grade | — | Industrial |
| Package Abbreviation | — | FPBGA-256 |
| Package Shape | — | Square |
| Terminal Type | — | Ball |
| Terminal Count | — | 256 balls |
| Lead-Free Status | — | Lead free |
| Programmable Logic Type | — | FPGA |
| DSP Support | — | Advanced DSP blocks supported by the LatticeECP2/M family |
| SERDES Support | — | High-speed SERDES supported by the LatticeECP2M family |