LFE2-6E-7T144C vs LFE2-6E-5T144I Comparaison
Comparaison détaillée côte à côte de LFE2-6E-7T144C par Lattice Semiconductor et LFE2-6E-5T144I par Lattice Semiconductor. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Lattice Semiconductor
LFE2-6E-7T144C - 6K LUT ECP2 FPGA | Lattice Semiconductor
LFE2-6E-7T144C UnknownComparaison des spécifications
| Paramètre | LFE2-6E-7T144C | LFE2-6E-5T144I |
|---|---|---|
| Marque | Lattice Semiconductor | Lattice Semiconductor |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Unknown | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Device Type | ECP2 Field Programmable Gate Array (FPGA) | ECP2 Field Programmable Gate Array (FPGA) |
| Logic Cells | 6,000 cells | — |
| Embedded RAM | 56,320 bits | — |
| User I/O | 90 I/O | — |
| Logic Blocks | 750 LABs/CLBs | — |
| Technology | 90 nm | — |
| Nominal Supply Voltage | 1.2 V | — |
| Supply Voltage Range | 1.14 V to 1.26 V | — |
| Speed Designation | -7 | — |
| DSP Support | DSP | — |
| Boîtier | 144-pin LQFP | 144-pin TQFP, 20 x 20 mm |
| Package Type | Surface-mount gull-wing | — |
| Package Shape | Square | — |
| Température de jonction en fonctionnement | 0C to 85C | -40°C to +100°C |
| Catégorie | Programmable Logic Devices | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Status | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Logic Capacity | — | 6K LUTs |
| User-Programmable I/O | — | 90 I/O |
| RAM Capacity | — | 56,320 RAM bits |
| Core Supply Voltage | — | 1.2 V nominal |
| Operating Voltage Range | — | 1.14 V to 1.26 V |
| Device Speed Grade | — | -5 |
| Type de montage | — | Surface Mount |
| Logic Technology | — | 90 nm FPGA technology |
| DSP Feature | — | Advanced DSP blocks |
| Pin Pitch | — | [DATA_NEEDED: package pin pitch] |
| Configuration Interface | — | [DATA_NEEDED: configuration interface] |
| Fréquence d'horloge maximale | — | [DATA_NEEDED: maximum clock frequency] |
| Embedded Memory Type | — | [DATA_NEEDED: block RAM and distributed RAM details] |
| I/O Standards | — | [DATA_NEEDED: supported I/O standards] |