LPC4333JET100E vs LPC4320FET100 Comparaison
Comparaison détaillée côte à côte de LPC4333JET100E par NXP Semiconductors et LPC4320FET100 par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
LPC4333JET100E - 204MHz Dual-Core MCU with 512KB Flash | NXP
LPC4333JET100E ✓ ActifComparaison des spécifications
| Paramètre | LPC4333JET100E | LPC4320FET100 |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | Actif |
| Product Type | 32-bit dual-core microcontroller | 32-bit dual-core microcontroller |
| Main Processor Core | Arm Cortex-M4 | — |
| Coprocessor Core | Arm Cortex-M0 | Arm Cortex-M0 |
| Maximum Processor Frequency | 204 MHz | — |
| Architecture | 32-bit | — |
| On-Chip Flash Memory | 512 KB | — |
| On-Chip SRAM | 136 KB | 200 kB |
| On-Chip EEPROM | 16 KB | — |
| Ethernet Interface | 1 Ethernet interface | — |
| USB Interface | 2 high-speed USB interfaces | — |
| External Serial Flash Interface | Quad SPI Flash Interface (SPIFI) | — |
| LCD Support | Yes | — |
| Configurable Timer | State Configurable Timer (SCT) | — |
| Serial GPIO Interface | Serial General Purpose I/O (SGPIO) | — |
| Boîtier | 100-TFBGA, 9 x 9 mm | TFBGA-100, 9 x 9 mm |
| Type de montage | Surface Mount | Surface mount |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Main Core | — | Arm Cortex-M4 |
| Maximum Clock Speed | — | 204 MHz |
| Largeur du bus de données | — | 32 bit |
| External Memory | — | SPIFI interface; flashless device |
| Tension d'alimentation | — | 2.2 V to 3.6 V |
| I/O Ports | — | 49 |
| USB Interfaces | — | Two high-speed USB interfaces |
| Ethernet | — | Integrated Ethernet |
| CAN | — | Integrated CAN |
| Security | — | AES hardware capability listed |
| Core Count | — | 2 |
| Processor Architecture | — | Arm Cortex-M4/M0 |
| Lifecycle Stage | — | Active |
| REACH Status | — | [DATA_NEEDED: REACH status] |