LTC2256CUJ-14 vs LTC2151CUJ-14 Comparaison
Comparaison détaillée côte à côte de LTC2256CUJ-14 par Analog Devices et LTC2151CUJ-14 par Analog Devices. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | LTC2256CUJ-14 | LTC2151CUJ-14 |
|---|---|---|
| Marque | Analog Devices | Analog Devices |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $6,90 | $29,10 |
| Résolution | 14 bit | 14 bits |
| Sample Rate | 25 Msps | 210 Msps |
| Number of Inputs | 1 | — |
| Architecture | Pipelined | Pipelined, 5-cycle latency |
| Tension d'alimentation | 1.8 V (single) | — |
| Power Dissipation | 35 mW at 25 Msps | — |
| INL | ±1 LSB (typical) | — |
| DNL | ±0.3 LSB (typical) | — |
| Transition Noise | 1.13 LSB RMS | 1.82 LSB RMS |
| SNR | 73 dB | — |
| Input Bandwidth (Full Power) | 800 MHz | — |
| Input Range | 1 Vp-p to 2 Vp-p (selectable, differential) | — |
| Digital Output Modes | Full-rate CMOS, DDR CMOS, DDR LVDS (selectable) | — |
| Output Supply Range (CMOS) | 1.2 V to 1.8 V | — |
| Boîtier | 40-QFN (6 mm x 6 mm) | 40-QFN (6x6 mm) exposed pad |
| Pin/Package Code | UJ (QFN-40, 6x6 mm) | — |
| Configuration Interface | Serial SPI port | — |
| Power-Saving Modes | Nap mode, full shutdown | — |
| Optional Features | Clock duty-cycle stabilizer, data output randomizer | — |
| Température de fonctionnement | 0C to +70C (commercial C-grade) | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Compliant (PBF suffix) | — |
| Number of Input Channels | — | 1 differential |
| Input Bandwidth | — | 1.25 GHz |
| SNR (typical) | — | 70 dB |
| SFDR (typical) | — | 90 dB |
| INL (typical) | — | +/-0.85 LSB |
| DNL (typical) | — | +/-0.25 LSB |
| Missing Codes | — | None over temperature |
| Digital Output Interface | — | DDR LVDS |
| Encode Input Compatibility | — | Differential sine, PECL, LVDS, TTL, CMOS |
| Clock Duty-Cycle Stabilizer | — | Yes (optional) |
| Operating Temperature Grade | — | Commercial |
| Lead Free / RoHS | — | Yes (Pb-free #PBF suffix) |