LTC2256CUJ-14 vs LTC2260CUJ-14 Comparaison
Comparaison détaillée côte à côte de LTC2256CUJ-14 par Analog Devices et LTC2260CUJ-14 par Analog Devices. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Analog Devices
LTC2260CUJ-14 - 14-Bit 105Msps Ultra-Low Power 1.8V ADC | Analog Devices
LTC2260CUJ-14 ✓ ActifComparaison des spécifications
| Paramètre | LTC2256CUJ-14 | LTC2260CUJ-14 |
|---|---|---|
| Marque | Analog Devices | Analog Devices |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $6,90 | $19,40 |
| Résolution | 14 bit | 14 bit |
| Sample Rate | 25 Msps | — |
| Number of Inputs | 1 | 1 |
| Architecture | Pipelined | Pipelined |
| Tension d'alimentation | 1.8 V (single) | — |
| Power Dissipation | 35 mW at 25 Msps | 130 mW (typical at 105 Msps) |
| INL | ±1 LSB (typical) | — |
| DNL | ±0.3 LSB (typical) | — |
| Transition Noise | 1.13 LSB RMS | 1.2 LSB RMS |
| SNR | 73 dB | — |
| Input Bandwidth (Full Power) | 800 MHz | — |
| Input Range | 1 Vp-p to 2 Vp-p (selectable, differential) | — |
| Digital Output Modes | Full-rate CMOS, DDR CMOS, DDR LVDS (selectable) | — |
| Output Supply Range (CMOS) | 1.2 V to 1.8 V | — |
| Boîtier | 40-QFN (6 mm x 6 mm) | 40-QFN (6x6 mm) with exposed pad |
| Pin/Package Code | UJ (QFN-40, 6x6 mm) | — |
| Configuration Interface | Serial SPI port | Serial SPI |
| Power-Saving Modes | Nap mode, full shutdown | Shutdown and Nap |
| Optional Features | Clock duty-cycle stabilizer, data output randomizer | — |
| Température de fonctionnement | 0C to +70C (commercial C-grade) | — |
| Type de montage | Surface Mount | — |
| Statut RoHS | Compliant (PBF suffix) | Compliant |
| Fréquence d'échantillonnage | — | 105 Msps |
| Input Type | — | Single-ended / Differential |
| Analog Supply Voltage | — | 1.8 V (typical) |
| Output Supply Voltage | — | 1.2 V to 1.8 V |
| INL (typical) | — | ±1 LSB |
| DNL (typical) | — | ±0.3 LSB |
| Output Interface | — | CMOS / DDR CMOS / DDR LVDS |
| Operating Temperature Range (C grade) | — | 0°C to +70°C |
| Clock Duty Cycle Stabilizer | — | Optional, user-selectable |