LTC2261IUJ-14 vs LTC2260CUJ-14 Comparaison
Comparaison détaillée côte à côte de LTC2261IUJ-14 par Analog Devices et LTC2260CUJ-14 par Analog Devices. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Analog Devices
LTC2260CUJ-14 - 14-Bit 105Msps Ultra-Low Power 1.8V ADC | Analog Devices
LTC2260CUJ-14 ✓ ActifComparaison des spécifications
| Paramètre | LTC2261IUJ-14 | LTC2260CUJ-14 |
|---|---|---|
| Marque | Analog Devices | Analog Devices |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $26,80 | $19,40 |
| Résolution | 14 bits | 14 bit |
| Sample Rate | 125 Msps | — |
| Architecture | Pipelined | Pipelined |
| Number of Channels | 1 | — |
| Input Type | Differential (single-ended capable with biasing) | Single-ended / Differential |
| Analog Supply Voltage (AVDD) | 1.8 V | — |
| Output Supply Voltage (OVDD) | 1.2 V to 1.8 V | — |
| Integral Nonlinearity (INL) | ±1 LSB (typical) | — |
| Differential Nonlinearity (DNL) | ±0.3 LSB (typical) | — |
| Transition Noise | 1.2 LSB RMS | 1.2 LSB RMS |
| Signal-to-Noise Ratio (SNR) | 73.4 dB | — |
| Spurious-Free Dynamic Range (SFDR) | 85 dB | — |
| Missing Codes | None over temperature | — |
| Digital Output Modes | Full-rate CMOS, DDR CMOS, DDR LVDS | — |
| Plage de température de fonctionnement | -40 °C to +85 °C (I grade) | — |
| Boîtier | 40-pin QFN (6x6 mm) with exposed pad | 40-QFN (6x6 mm) with exposed pad |
| Type de montage | Surface Mount | — |
| Statut RoHS | Compliant (PBF suffix) | Compliant |
| Number of Inputs | — | 1 |
| Fréquence d'échantillonnage | — | 105 Msps |
| Analog Supply Voltage | — | 1.8 V (typical) |
| Output Supply Voltage | — | 1.2 V to 1.8 V |
| Power Dissipation | — | 130 mW (typical at 105 Msps) |
| INL (typical) | — | ±1 LSB |
| DNL (typical) | — | ±0.3 LSB |
| Output Interface | — | CMOS / DDR CMOS / DDR LVDS |
| Operating Temperature Range (C grade) | — | 0°C to +70°C |
| Configuration Interface | — | Serial SPI |
| Power-Saving Modes | — | Shutdown and Nap |
| Clock Duty Cycle Stabilizer | — | Optional, user-selectable |