LTC2280CUP vs LTC2150CUJ-14 Comparaison
Comparaison détaillée côte à côte de LTC2280CUP par Analog Devices et LTC2150CUJ-14 par Analog Devices. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Analog Devices
LTC2280CUP - Dual 10-Bit 105Msps Low-Noise 3V ADC | Analog Devices
LTC2280CUP ✓ ActifAnalog Devices
LTC2150CUJ-14 - 14-Bit 170Msps 1.8V ADC DDR LVDS | Analog Devices
LTC2150CUJ-14 ✓ ActifComparaison des spécifications
| Paramètre | LTC2280CUP | LTC2150CUJ-14 |
|---|---|---|
| Marque | Analog Devices | Analog Devices |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $15,85 | $41,58 |
| Résolution | 10 bit | 14 bit |
| Number of Channels | 2 (dual, simultaneous sampling) | 1 |
| Sample Rate | 105 Msps per channel | 170 Msps |
| Architecture | Pipelined | Pipelined |
| Input Type | Differential / single-ended | — |
| Supply Voltage (Analog) | 3 V (2.85 V to 3.4 V) | — |
| Supply Voltage (Digital) | 3 V | — |
| Power Dissipation (typical) | 250 mW at 105 Msps, both channels | — |
| SNR (14 MHz input) | 61.6 dB | — |
| SFDR | 73 dB | — |
| Input-Referred Noise | 0.96 LSBrms | — |
| Input Bandwidth | 70 MHz | — |
| Output Format | LVCMOS (parallel) | — |
| Plage de température de fonctionnement | 0 C to +70 C (commercial grade) | — |
| Boîtier | 64-pin QFN (9x9 mm) with exposed pad | 40-QFN (6 mm × 6 mm) with exposed pad |
| Statut RoHS | Compliant (lead-free #PBF suffix) | Compliant (Pb-free #PBF suffix) |
| Analog Supply Voltage | — | 1.7 V to 1.9 V (1.8 V nominal) |
| Digital Supply Voltage | — | 1.7 V to 1.9 V (1.8 V nominal) |
| INL (typical) | — | ±0.85 LSB |
| DNL (typical) | — | ±0.25 LSB |
| Transition Noise | — | 1.82 LSBRMS |
| Missing Codes | — | None over temperature |
| Full-Power Sample/Hold Bandwidth | — | 1.25 GHz |
| Digital Output Interface | — | DDR LVDS |
| Encode Clock Inputs | — | Differential ENC+/ENC- (sine, PECL, LVDS, TTL, CMOS) |
| Clock Duty-Cycle Stabilizer | — | Optional (selectable) |
| Configuration Interface | — | Serial SPI port |
| Latency | — | 5 clock cycles |
| Power-Saving Modes | — | Sleep and Nap modes |
| Type de montage | — | Surface Mount |