M1AFS250-PQ208 vs M1AFS250-2PQG208 Comparaison
Comparaison détaillée côte à côte de M1AFS250-PQ208 par Microsemi et M1AFS250-2PQG208 par Microsemi. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microsemi
M1AFS250-2PQG208 - 250K Gate Fusion Mixed-Signal FPGA | Microsemi
M1AFS250-2PQG208 ✓ ActifComparaison des spécifications
| Paramètre | M1AFS250-PQ208 | M1AFS250-2PQG208 |
|---|---|---|
| Marque | Microsemi | Microsemi |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $28,60 | $205,00 |
| Logic Gates | 250000 gates | — |
| Fabric Cells / VersaTiles | 6144 cells | — |
| Number of I/O | 93 | 93 |
| User Flash Memory | 36864 bits | — |
| Core Supply Voltage | 1.5 V | — |
| Process Technology | 130 nm flash CMOS | — |
| Configuration Memory | Flash-based, on-chip (nonvolatile) | — |
| Security | 128-bit flash lock, AES decryption | — |
| Boîtier | 208-Pin PQFP / BFQFP | 208-BFQFP (208-PQFP) |
| Terminal Pitch | 0.5 mm | — |
| Type de montage | Surface Mount | Surface Mount |
| Analog Blocks | Configurable analog (ADC inputs, monitoring) per Fusion family | Yes (configurable analog mixed-signal peripherals) |
| Clock Management | On-chip PLL / clock conditioning circuitry | On-chip clock generation and management circuitry |
| Power-Up Behavior | Functional immediately at power-up (no external boot device) | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Compliant (G = RoHS/green suffix) |
| Max Frequency Reference | 1098.9 MHz (family listing per Kynix) | — |
| Logic Cells | — | 6144 |
| System Gates | — | 250,000 |
| RAM Bits | — | 36864 |
| Tension d'alimentation | — | 1.425 V to 1.575 V |
| Speed Grade | — | -2 |
| Technology | — | 130 nm CMOS, flash-based |
| Family | — | Fusion (M1) Mixed-Signal FPGA |
| Junction Temperature Range | — | 0C to +85C |
| Programming Type | — | In-System Programmable (flash-based, non-volatile) |
| Operating Temperature Ambient | — | [DATA_NEEDED: ambient operating temperature range] |
| Max Operating Frequency | — | [DATA_NEEDED: maximum system frequency] |
| Thermal Resistance theta-JA | — | [DATA_NEEDED: thermal resistance] |