MPC8535ECVTAKGA vs MPC8535ECVTAKGA557 Comparaison
Comparaison détaillée côte à côte de MPC8535ECVTAKGA par NXP Semiconductors et MPC8535ECVTAKGA557 par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MPC8535ECVTAKGA - PowerQUICC III MPU, 600MHz, 783-FCBGA | NXP
MPC8535ECVTAKGA ✓ ActifNXP Semiconductors
MPC8535ECVTAKGA557 - 600MHz PowerQUICC III e500 MPU | NXP
MPC8535ECVTAKGA557 NrndComparaison des spécifications
| Paramètre | MPC8535ECVTAKGA | MPC8535ECVTAKGA557 |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $81,20 | $175,50 |
| Core Architecture | PowerPC e500 | PowerPC e500 |
| Family | PowerQUICC III (MPC85xx) | — |
| Number of Cores | 1 | 1 |
| Largeur du bus de données | 32-bit | 32-bit |
| Maximum Core Frequency | 600 MHz | 600 MHz |
| Core Voltage (typ.) | 1.0 V | — |
| Memory Controller | DDR2 / DDR3 with ECC | — |
| Peripheral Interfaces | PCI / PCIe, SATA, GbE, SDHC, Local Bus, I2C, UART, GPIO | — |
| Security Engine | SEC (IPSec / SSL / TLS / bulk crypto) | — |
| Boîtier | 783-FCBGA (29x29 mm) | 783-ball FC-PBGA (29x29 mm) |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Température de fonctionnement | -40C to +105C (Extended) | [DATA_NEEDED: commercial/extended grade] |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status per datasheet] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Manufacturer | — | NXP Semiconductors (formerly Freescale) |
| Series | — | PowerQUICC III (MPC85xx) |
| Core Voltage | — | 1 V |
| Packaging | — | Tray |
| Lead Free Status | — | Lead Free |
| L1 Cache | — | [DATA_NEEDED: L1 instruction/data cache size] |
| L2 Cache | — | [DATA_NEEDED: L2 unified cache size] |
| MMU | — | [DATA_NEEDED: Book E hardware table-walk details] |
| Process Technology | — | [DATA_NEEDED: CMOS process node] |