MPC8548ECPXAUJC vs MPC8548PXAUJB Comparaison
Comparaison détaillée côte à côte de MPC8548ECPXAUJC par NXP Semiconductors et MPC8548PXAUJB par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MPC8548ECPXAUJC - PowerPC e500 MPU 1.333GHz 783-BGA | NXP
MPC8548ECPXAUJC ObsoleteComparaison des spécifications
| Paramètre | MPC8548ECPXAUJC | MPC8548PXAUJB |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $189,90 | $121,75 |
| Series | MPC85xx | PowerQUICC III / MPC85xx |
| Core Processor | PowerPC e500 | — |
| Number of Cores / Bus Width | 1 Core, 32-Bit | — |
| Core Frequency | 1.333 GHz | — |
| Co-Processors / DSP | Signal Processing; SPE, Security; SEC | — |
| RAM Controllers | DDR, DDR2, SDRAM | — |
| Graphics Acceleration | No | — |
| Display & Interface Controllers | [DATA_NEEDED: specific display controller block] | — |
| Ethernet | 10/100/1000 Mbps (4 MACs) | 4x Gigabit Ethernet (SGMII) |
| SATA | [DATA_NEEDED: SATA revision and port count] | — |
| USB | [DATA_NEEDED: USB version and port count] | — |
| PCI Express | Yes, 3 ports | [DATA_NEEDED: PCIe lane count] |
| Serial RapidIO | Yes, 2 ports | — |
| Security Engine | SEC (DES, 3DES, AES, RSA, ECC) | — |
| Boîtier | 783-BBGA, FCBGA | 783-FCBGA (29x29 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -40C to +105C (industrial) | [DATA_NEEDED: operating temperature range] |
| Part Status | Obsolete | — |
| Statut RoHS | [DATA_NEEDED: per NXP product page] | Compliant (per NXP product page) |
| Lead-Free | [DATA_NEEDED: per NXP product page] | Yes |
| Manufacturer | — | NXP Semiconductors (formerly Freescale) |
| Core Architecture | — | PowerPC e500 (32-bit) |
| Number of Cores | — | 1 |
| Maximum Core Frequency | — | 1.333 GHz |
| L1 Cache | — | 32 KB instruction + 32 KB data |
| L2 Cache | — | [DATA_NEEDED: L2 cache size] |
| Memory Controller | — | DDR2 SDRAM, up to [DATA_NEEDED: max memory] |
| RapidIO | — | Yes (serial RapidIO) |
| QUICC Engine | — | Yes (protocol offload subsystem) |