MT25QU256ABA1EW7-0SIT-TR vs MT25QU256ABA1EW7-0SIT Comparaison
Comparaison détaillée côte à côte de MT25QU256ABA1EW7-0SIT-TR par Micron Technology et MT25QU256ABA1EW7-0SIT par Micron Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Micron Technology
MT25QU256ABA1EW7-0SIT-TR - 256Mb 1.8V Quad SPI NOR Flash | Micron
MT25QU256ABA1EW7-0SIT-TR ✓ ActifMicron Technology
MT25QU256ABA1EW7-0SIT - 256Mb 1.8V Quad SPI NOR Flash | Micron
MT25QU256ABA1EW7-0SIT ✓ ActifComparaison des spécifications
| Paramètre | MT25QU256ABA1EW7-0SIT-TR | MT25QU256ABA1EW7-0SIT |
|---|---|---|
| Marque | Micron Technology | Micron Technology |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1,78 | $2,05 |
| Density | 256 Mbit (32 MB) | 256 Mbit (32 MB) |
| Type de mémoire | NOR Flash, Serial (SPI) | Non-Volatile NOR Flash |
| Memory Organization | 256M x 1 / 128M x 2 / 64M x 4 bit | 64M x 4 / 32M x 8 / 16M x 16 |
| Supply Voltage (VCC) | 1.7 V to 2.0 V | 1.7 V to 2.0 V (1.8 V nominal) |
| Fréquence d'horloge maximale | 133 MHz | — |
| Interface Modes | Single SPI, Dual SPI, Quad SPI | — |
| Maximum Throughput | 532 Mbit/s (Quad SPI) | — |
| Sector Architecture | 4 KB parameter + 64 KB uniform sectors | — |
| Endurance | 100,000 erase/write cycles per sector | — |
| Data Retention | 20 years (typical) | 20 years (typical) |
| Température de fonctionnement | -40C to +85C (industrial) | -40 °C to +85 °C |
| Boîtier | 8-WPDFN 6x5 mm (MLP8) | 8-WPDFN (6x5 mm, MLP8) with Exposed Pad |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL moisture sensitivity level] |
| Statut RoHS | Compliant | Compliant |
| XIP (Execute-in-Place) | Supported | — |
| Write Protection | Hardware WP#, software, and absolute protection | Hardware WP#, Software, and Absolute Lock |
| OTP Security Register | 256 bytes (3 x 64-byte regions, plus 64 lock bits) | — |
| Packaging | Tape and Reel (TR suffix) | — |
| Technology Node | 65 nm floating-gate NOR | — |
| Memory Format | — | Serial NOR Flash |
| Technology | — | SLC NOR (Single-Level Cell) |
| Interface | — | SPI, Dual SPI, Quad SPI, Octal/DTR SPI |
| Clock Frequency (Quad I/O) | — | 133 MHz |
| Access Time | — | 6 ns |
| Sector Size | — | 4 KB (subsector 32 KB, block 64 KB) |
| Program/Erase Endurance | — | 100,000 cycles per sector (typical) |
| Security Features | — | 256-byte security register, OTP bits |
| JEDEC Standard | — | JESD216 SFDP |