P1022NXN2LFB vs P1022NSE2HFB Comparaison
Comparaison détaillée côte à côte de P1022NXN2LFB par NXP Semiconductors et P1022NSE2HFB par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
P1022NXN2LFB - QorIQ Dual-Core 1.067 GHz SoC | NXP | Networking
P1022NXN2LFB ⚠ Dernier achatNXP Semiconductors
P1022NSE2HFB - QorIQ P1 1.055GHz Dual-Core PowerPC MPU | NXP
P1022NSE2HFB ⚠ Dernier achatComparaison des spécifications
| Paramètre | P1022NXN2LFB | P1022NSE2HFB |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Dernier achat | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $78,40 | $75,00 |
| Architecture | Power Architecture e500 dual-core (RISC, 32-bit) | — |
| Clock Speed (Core) | 1.067 GHz | — |
| Platform Version | 1067/533/667 ET NE r1.1 | — |
| Core Count | 2 | — |
| Package Type | TEPBGA-689 (Plastic, halogen-free, RoHS-compliant) | — |
| Package Dimensions | 31 x 31 mm, 2.23 mm height | — |
| Nombre de broches | 689 | — |
| Température de fonctionnement | -40 °C to +125 °C (industrial) | 0 C to +105 C (junction) |
| Tension d'alimentation | 3.13 V to 3.47 V | — |
| Memory Controller | DDR2/DDR3 with ECC support, up to 32-bit | 32-bit DDR2/DDR3 with ECC |
| Ethernet MACs | 3 x 10/100/1000 Mbps Gigabit | — |
| PCIe Interfaces | 3 x PCIe Gen1 | — |
| USB | USB 2.0 host/device | USB 2.0 |
| Display Controller | 32-bit LCD controller | — |
| Security Engine | Integrated (symmetric/asymmetric crypto acceleration) | SEC (cryptographic accelerator) |
| RoHS Compliance | Yes (halogen-free) | — |
| Type de montage | Surface Mount (BGA, requires thermal via array under die) | Surface Mount |
| Manufacturer | — | NXP Semiconductors (formerly Freescale) |
| Series | — | QorIQ P1 |
| Processor Type | — | PowerPC e500v2 MPU |
| Number of Cores | — | 2 |
| Core Architecture | — | Power Architecture (e500 v2), 32-bit |
| Maximum Core Frequency | — | 1.055 GHz |
| L1 Cache (per core) | — | 32 KB instruction + 32 KB data |
| Ethernet | — | 2x integrated Gigabit Ethernet (GbE) |
| PCI Express | — | 3x PCIe controllers |
| LCD Controller | — | Integrated |
| Boîtier / Format | — | 689-TEPBGA II (31 x 31 mm) with exposed pad |
| Statut RoHS | — | Compliant |
| Lead Free Status | — | Lead Free |
| Packaging | — | Tray |