PI7C9X3G1224GPAHFCE vs PI7C9X3G1224GPBHFCE Comparaison
Comparaison détaillée côte à côte de PI7C9X3G1224GPAHFCE par Diodes Incorporated et PI7C9X3G1224GPBHFCE par Diodes Incorporated. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Diodes Incorporated
PI7C9X3G1224GPAHFCE - PCIe Gen3 12-Port 24-Lane Switch | Diodes
PI7C9X3G1224GPAHFCE ✓ ActifDiodes Incorporated
PI7C9X3G1224GPBHFCE - PCIe Gen3 24-Lane Packet Switch | Diodes Inc.
PI7C9X3G1224GPBHFCE ✓ ActifComparaison des spécifications
| Paramètre | PI7C9X3G1224GPAHFCE | PI7C9X3G1224GPBHFCE |
|---|---|---|
| Marque | Diodes Incorporated | Diodes Incorporated |
| Catégorie | Interface ICs | Interface ICs |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Interface Standard | PCI Express Gen3 (8 GT/s per lane) | PCI Express Gen3 (PCIe 3.0) |
| Total Lanes | 24 | — |
| Port Count | Flexible 3-port to 12-port configurations | — |
| SERDES Data Rate | 8 Gb/s per lane (Gen3) | 8 GT/s (Gen3) |
| Architecture | Tile-based packet switch (Tile 0: 8 ports / 16 lanes) | Tile-based switching fabric |
| Lane Width Allocation | Variable lane width per port | — |
| Boîtier | 324-ball H-FCBGA, 19 x 19 mm | 324-HFCBGA (19x19 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Packaging | Tray, 84 pieces | Tray, 84 pcs per tray |
| Core Supply Voltage | [DATA_NEEDED: core supply voltage] | — |
| Power Dissipation | [DATA_NEEDED: typical power dissipation] | [DATA_NEEDED: typical power dissipation] |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Number of Virtual PCI-to-PCI Bridges | [DATA_NEEDED: bridge count] | — |
| Reference Clock Support | [DATA_NEEDED: clocking options] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Niveau MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Fonction | — | Packet Switch |
| Number of Ports | — | 3 to 12 (flexible configuration) |
| Number of Lanes | — | 24 |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Supply Voltage (Core) | — | [DATA_NEEDED: core supply voltage] |
| Supply Voltage (IO) | — | [DATA_NEEDED: IO supply voltage] |
| Lane Width per Port | — | Variable (allocated per port) |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |
| Supported Topologies | — | Fan-out and aggregation (port bifurcation) |